Advantech PCI-1706U Manuel d'utilisateur Page 31

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25 PCI-1706U User Manual
Chapter 3 Signal Connections
Figure 3.4 Differential input channel connection -
floating signal source
3.3.2.2 Buffered AI Trigger and CLK Source Connections
The PCI-1706U introduces a double-clock system, with SCAN clock and CONV
clock, to generate efficient A/D conversion clocks at dedicated timing. A/D conver-
sion clocks come from internal clock sources or external signals on connector. The
CLK has several sources.
Internal A/D clock derived from 32-bit divider
External A/D clock from terminal board
With PCI-1706U, user can define the type of trigger source as rising-edge or falling-
edge. The Trigger has several sources.
External digital (TTL) trigger from terminal board
Soft trigger
Analog threshold trigger
Figure 3.5 Trigger Source and CLK Source Connection
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