Advantech PCI-1720 Manuel d'utilisateur télécharger pdf (Page 33)

Chapter 4 Register Structure and Format 29

4.9 Clear Interrupt and FIFO  BASE+8

and BASE+9

Writing data to either of these two bytes clears the interrupt or the

FIFO.

Table 4-8: Registers to clear interrupt and FIFO

4.10 Programmable Timer/Counter

Registers  BASE+24, BASE+26,

BASE+28 and BASE+30

The four registers of BASE+24, BASE+26, BASE+28 and BASE+30

are used for the 82C54 programmable timer/counter. Please refer to

Appendix A data sheets for detailed application information.

Note!: Users have to use a 16-bit (word) command to read/write

each register.

Write Clear Interrupt and FIFO

Bit # 7 6 5 4 3 2 1 0

BASE+9 Clear FIFO

BASE+8 Clear Interrupt

1 2 ... 28 29 30 31 32 33 34 35 36 37 38 ... 53 54

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Advantech PCI-1720 Manuel d'utilisateur Page 33