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43 PCI-1730/1733/1734 User Manual

Appendix C Register Structure & Format

C.8 Interrupt Status Register

BASE+8H/CH/10H

The PCI-1730 Interrupt Status Register control the status of four interrupt signal

sources (IDI0, IDI1, DI0, DI1).

Table C-8 Register for Interrupt Status

IDI/DInF Interrupt flag bits (n = 0 ~ 1)

This bit is a flag indicating the status of an interrupt. User can read this bit to get the

status of the interrupt

0 No interrupt

1 Interrupt occurred

IDI/DInEN Interrupt enable control bits (n = 0 ~ 1)

Read this bit to Enable/Disable the interrupt.

0 Disable

1 Enable

IDI/DInRF Interrupt triggering control bits (n = 0 ~ 1)

The interrupt can be triggered by a rising edge or falling edge of the interrupt signal,

as determined by the value in this bit.

0 Rising edge trigger

1 Falling edge trigger

The PCI-1733 Interrupt Status Register control the status of four interrupt signal

sources (IDI0, IDI1, IDI16, IDI17).

Table C-9 Register for Interrupt Status

Read Interrupt Status Register

Bit #76543210

BASE + 8H DI1EN DI0EN IDI1EN IDI0EN

BASE + CH DI1RF DI0RF IDI1RF IDI0RF

BASE + 10H DI1F DI0F IDI1F IDI0F

Read Interrupt Status Register

Bit #76543210

BASE + 8H IDI17EN IDI16EN IDI1EN IDI0EN

BASE + CH IDI17RF IDI16RF IDI1RF IDI0RF

BASE + 10H IDI17F IDI16F IDI1F IDI0F

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Advantech PCI-1730 Manuel d'utilisateur Page 51