Advantech PCI-1751U Manuel d'utilisateur télécharger pdf (Page 16)

PCI-1751U User Manual 12

2.6 Pin Assignments

Port0:

PA00 ~ PA07: I/O pins of Port A0

PB00 ~ PB07: I/O pins of Port B0

PC00 ~ PC07: I/O pins of Port C0

Port1:

PA10 ~ PA17: I/O pins of Port A1

PB10 ~ PB17: I/O pins of Port B1

PC10 ~ PC17: I/O pins of Port C1

CNT0_OUT, CNT1_OUT and

CNT2_OUT:

Output pins of Counter/Timer 0, 1

and 2

CNT0_CLK, CNT1_CLK and

CNT2_CLK:

External clock source of Counter /

Timer 0, 1 and 2

CNT0_G, CNT1_G and

CNT2_G:

Gate control pins of Counter /

Timer 0, 1 and 2

INT_OUT: Interrupt output. This

pin changes to logic 1 whenever

PCI-1751U generates an interrupt,

and returns to logic 0 when the

interrupt is cleared.

GND: Ground

VCC: +5 VDC voltage output

1 2 ... 11 12 13 14 15 16 17 18 19 20 21 ... 37 38

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