Advantech PCL-740 Spécifications

PCL-740Serial CommunicationRS-232/422/485/Current-LoopInterface Card

Chapter 2 Hardware Installation 72HardwareInstallationCHAPTER

8 PCL-740 User's ManualInitial InspectionDepending on the option you ordered, you should find (in addition tothis manual) the following items i

Chapter 2 Hardware Installation 9ProtocolSelectionBaseAddressIRQSelectionRx Active/PassiveTx Active/PassiveCurrent-loop selectRS-422/485RS-23

10 PCL-740 User's ManualCard ConfigurationEach port of the PCL-740 card has two associated status jumpergroups and one six position DIP switch.

Chapter 2 Hardware Installation 11Default SettingsThe board will be shipped in the RS-232 mode. If your requirementsare the same as this defa

12 PCL-740 User's ManualJumper settingsProtocol SelectionFirst you have to decide which mode each port will be operating in,RS-232, RS-422, RS-

Chapter 2 Hardware Installation 13I/O Address and Interrupt SetupI/O Address SetupThe I/O base address the PC-740 is selectable by a 6 positi

Port base address (SW1)Base address A3 A4 A5 A6 A7 A8200-207 l l l l l l208-20F ¡ l l l l l - -2E8-2EF ¡ l ¡ ¡ ¡ l - -2F8-2EF ¡ ¡ ¡ ¡ ¡ l - -3E8

IRQ 15 12 11 10 9 7 6 5 4 3Interrupt Level (IRQ) SettingThe PCL-740 card is designed to access interrupt levels 3 up to level15 with the exception of

16 PCL-740 User's ManualCard installationWarning! Turn off your PC’s power supply whenever youinstall or remove the PCL-740 or its cables. Stat

Part No. 200074010 2nd EditionPrinted in Taiwan May 2001Copyright NoticeThis documentation and the software included with this product arecopyrig

Appendix A Register structure and format 17ARegister structureand formatAPPENDIX

18 PCL-740 User's ManualRegister StructureThis appendix gives short description of each of the module's regis-ters. For more information pl

Appendix A Register structure and format 19BASE+1 Interrupt Status Register (ISR) when DLAB=0bit 0 Enable received-data-available interruptbit

20 PCL-740 User's ManualBASE+4 Modem Control Register (MCR)bit 0 DTRbit 1 RTSBASE+5 Line Status Register (LSR)bit 0 Receiver data readybit 1 Ove

Appendix A Register structure and format 21Programming exampleThe following C example shows how to program the PCL-740'sregisters directly

22 PCL-740 User's Manual /* Set up Port 2 (COM2) */ outport((base1+2),0xc9); /* Enable FIFO */ outp(base1+3,0x80); /* Set DLAB=1

Appendix A Register structure and format 23 /* Receive data on Port 2 (COM2) */ i=0; flag=1; timeout=TIME_OUT; while (

24 PCL-740 User's Manual

Appendix B: PC I/O Address Assignments 25BPC I/O AddressReferenceAPPENDIX

26 PCL-740 User's ManualPC I/O Address UsageThe following table indicates the PC I/O address usage assignment. Toprevent conflicting settings o

ContentsChapter 1 Introduction ... 1Description...

Chapter 1 Introduction 11IntroductionCHAPTER

2 PCL-740 User's ManualDescriptionThe PCL-740 card enables RS-232, RS-422, RS-485 or current-loopserial communication for applications in diffi

Chapter 1 Introduction 3Features• Serial Port can be configured to RS-232/422/485 or current-loop• 16C550 FIFO UART (with 16-byte FIFO)• Baud

4 PCL-740 User's ManualSpecificationsBoard• Number of ports: 1• Protocol selection: RS-232/422/485 or current-loop• UART: 16C550 (16-byte FIFO)

Chapter 1 Introduction 5Current-loop interface• Signal driver/Receiver: 6N136• Signals: TxD+, TxD-, RxD+, RxD-• Current value: 20 mA (Standard

6 PCL-740 User's Manual