Advantech PCI-1731 Spécifications télécharger pdf (Page 49)

APPENDIX C

PCI-1711/1731 User’s Manual

Advantech Co., Ltd.

www.advantech.com

– 45 –

Example 2

If the start scan channel is AI13 and the stop scan channel is AI2, then

the scan sequence is AI13, AI14, AI15, AI0, AI1, AI2, AI13, AI14,

AI15, AI0, AI1, AI2, AI13, AI14…

C.7 Status Register — BASE+6 and BASE+7

The registers of BASE+6 and BASE+7 provide information for A/D

configuration and operation.

Table C-7 Status Register

The content of the status register of BASE+6 is the same as that of the

control register.

F/E FIFO Empty flag

This bit indicates whether the FIFO is empty.

1 means that the FIFO is empty.

F/H FIFO Half-full flag

This bit indicates whether the FIFO is half-full.

1 means that the FIFO is half-full.

F/F FIFO Full flag

This bit indicates whether the FIFO is full.

1 means that the FIFO is full.

IRQ Interrupt flag

This bit indicates the interrupt status.

1 means that an interrupt has occurred.

Write Control Register

Bit # 7 6 5 4 3 2 1 0

BASE + 6 CNT0 ONE/FH IRQEN GATE EXT PACER SW

1 2 ... 44 45 46 47 48 49 50 51 52 53 54 ... 59 60

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Advantech PCI-1731 Spécifications Page 49