PCI-1753/1753E96/192-bit Digital I/O CardUser's manual
6 PCI-1753 User's Manual1.5 Pin AssignmentsPA01PA02PA03PA04PA05PA06PA07PB01PB00PB02PB03PB04PB05PB06PB07PC01PC00PC02PC03PC04PC05PC06PC07GNDPA11PA1
Chapter 1 Gerneral Information 7Figure 1-1: PCI-1753/1753E Block Diagram1.6 Block Diagram
8 PCI-1753 User's Manual
Chapter 2 Installation 92InstallationCHAPTER
10 PCI-1753 User's Manual2.1 Initial InspectionBefore starting to install the PCI-1753/1753E, make sure there is novisible damage on the card.
Chapter 2 Installation 11CN1JP1CN2JPC0LJPB0JPC0HJPA0JPC1LJPB1JPC1HJPC3HJPC2HJPB2JPB3JPC2LJPC3LJPA3JPA1JPA22.3 Jumper SettingsWe designed the PC
12 PCI-1753 User's ManualUsing Jumpers to Set Ports as Output PortsBy shorting the two pins of the jumpers JPA0, JPB0, JPC0L, JPC0H,JPA1, JPB1,
Chapter 2 Installation 13Names of Jumpers Function descriptionJPA0, JPA1, JPA2 and JPA3: Jumpers forports A0, A1, A2 and A3JPB0, JPB1, JPB2 and
14 PCI-1753 User's Manual2.4 Installation InstructionsThe PCI-1753/1753E can be installed in any PCI slot in the computer.However, refer to the
Chapter 2 Installation 156. Secure the PCI-1753/1753E card by screwing the mounting bracketto the back panel of computer.7. Attach any accessor
CopyrightThis documentation and the software included with this product arecopyrighted 1999 by Advantech Co., Ltd. All rights are reserved.Advantech
16 PCI-1753 User's Manual
Chapter 3 Function Description 173OperationCHAPTER
18 PCI-1753 User's Manual3.1 OverviewThis chapter describes the operating characteristics of the PCI-1753/1753E. The driver software bundled
Chapter 3 Function Description 193.2.3 Input/Output ControlA control word can be written to a port's configuration register(Base+3, 7, 11
20 PCI-1753 User's ManualIf the jumper JP1 is enabled and the initial configuration is caused bya reset, all ports will return to the states th
Chapter 3 Function Description 213.3 Interrupt Functions3.3.1 IntroductionTwo lines of each I/O port C, plus ports A0 and B0, are connected tot
22 PCI-1753 User's ManualTable 3-2: Interrupt control register bit mapMn0 and Mn1: “mode bits” of port Cn (n = 0 ~ 3)M1: pattern match port ena
Chapter 3 Function Description 23M01:M000 00 11 01 1PC00PC04M11:M100 00 11 01 1PC10PC14M21:M200 00 11 01 1P
24 PCI-1753 User's Manual3.3.4 Interrupt Source ControlThe “mode bits” in the interrupt control registers determine theallowable sources of sig
Chapter 3 Function Description 253.3.5 Interrupt Triggering Edge ControlThe interrupt can be triggered by a rising edge or a falling edge of th
ContentsCHAPTER 1 General Information ... 11.1 Introduction ... 21.2 Fea
26 PCI-1753 User's Manual3.3.7 Pattern Match Interrupt FunctionThe PCI-1753/1753E provides the pattern match interrupt functionfor port A0. It
Chapter 3 Function Description 27c) Finally, enable the pattern match function for port A0 of the PCI-1753 by writing a “1” in bit 0 of Base+16
28 PCI-1753 User's ManualM2 Description1 Enable the change of state interrupt function for port A00 Disable the change of state interrupt funct
Appendix A Calibration 29ARegister Format ofPCI-1753/1753EAPPENDIX
30 PCI-1753 User's ManualBaseAddress+ (Decimal)FunctionRead Write0 Port A0 Port A01 Port B0 Port B02 Port C0 Port C03 Port 0 Configuration Regist
Appendix A Calibration 31BaseAddress+ (Decimal)FunctionRead Write32 Port A0 Port A033 Port B0 Port B034 Port C0 Port C035 Port 0 Configuration Regi
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Appendix A Calibration 33BPin Assignments of CablePCL-10268APPENDIX
34 PCI-1753 User's ManualPIN 02PIN 03PIN 04PIN 05PIN 06PIN 07PIN 08PIN 10PIN 09PIN 11PIN 12PIN 13PIN 14PIN 15PIN 16PIN 18PIN 17PIN 19PIN 20PIN 21
3.3.3 Interrupt Control Registers ... 213.3.4 Interrupt Source Control ...
1General InformationCHAPTER
2 PCI-1753 User's Manual1.1 IntroductionThe PCI-1753 is a 96-bit digital I/O card for the PCI bus, which canbe extended to 192 digital I/O channe
Chapter 1 Gerneral Information 31753/PCI-1753E controls how these signals generate an interrupt.More than one interrupt request signals can be gen
4 PCI-1753 User's Manual1.2 Features• 96/192 TTL digital I/O lines• Emulates mode 0 of 8255 PPI• Buffered circuits for higher driving capacity th
Chapter 1 Gerneral Information 51.4 SpecificationsI/O Channels96 digital I/O lines (PCI-1753 only)192 digital I/O lines (using PCI-1753E extension
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